An active-matrix substrate for use in a liquid crystal display device and other devices includes switching elements such as thin-film transistors (which will be simply referred to herein as “TFTs”), each of which is provided for an associated one of pixels. As such switching elements, a TFT that uses an amorphous silicon film as its active layer (and will be referred to herein as an “amorphous silicon TFT”) and a TFT that uses a polysilicon film as its active layer (and will be referred to herein as a “polysilicon TFT”) have been used extensively.
In a polysilicon film, electrons and holes have higher mobility than in an amorphous silicon film. That is why a polysilicon TFT has a larger ON-state current, and can operate faster, than an amorphous silicon TFT. Consequently, if an active-matrix substrate is made using polysilicon TFTs, the polysilicon TFTs can be used not only as switching elements but also in a driver and other peripheral circuits as well. As a result, part or all of the driver and other peripheral circuits and the display section can be integrated together on the same substrate, which is beneficial. In addition, the pixel capacitor of a liquid crystal display device, for example, can be charged in a shorter switching time as well, which is also advantageous.
If a polysilicon TFT is to be fabricated, however, the process step of crystallizing an amorphous silicon film with a laser beam or heat, a thermal annealing process step, and other complicated process steps should be carried out, thus raising the manufacturing cost per unit area of the substrate. For that reason, polysilicon TFTs are currently used mostly in small- and middle-sized liquid crystal display devices.
Meanwhile, an amorphous silicon film can be formed more easily than a polysilicon film, and therefore, can be used more suitably to make a device with a huge area. That is why amorphous silicon TFTs can be used effectively to make an active-matrix substrate of an apparatus that needs a big display area. In spite of their smaller ON-state current than polysilicon TFTs, amorphous silicon TFTs are currently used in the active-matrix substrate of most LCD TVs.
Nevertheless, if amorphous silicon TFTs are used, the mobility of the amorphous silicon film is too low (specifically, 0.5 cm2/Vs or less) to enhance their performance unlimitedly. Generally speaking, a liquid crystal display device such as an LCD TV must realize not just a huge display screen but also much higher image quality and far lower power dissipation as well. For that reason, it should be difficult for an amorphous silicon TFT to meet all of these expectations fully. Also, recently, there have been increasing a demand for driver-monolithic substrates to make the frame area as narrow as possible and cut down the cost as much as one can, and another demand for further performance enhancement by introducing a touchscreen panel function. However, it is difficult for an amorphous silicon TFT to meet these demands sufficiently.
Thus, to realize a TFT of even higher performance with the number of manufacturing processing steps and the manufacturing cost cut down, materials other than amorphous silicon and polysilicon have been tentatively used for the active layer of a TFT.
Patent Documents Nos. 1 and 2 propose making the active layer of a TFT of an oxide semiconductor film of zinc oxide, for example. Such a TFT will be referred to herein as an “oxide semiconductor TFT”. An oxide semiconductor has higher mobility (of about 10 cm2/Vs, for example) than amorphous silicon. That is why an oxide semiconductor TFT can operate faster than an amorphous silicon TFT. On top of that, an oxide semiconductor film can be formed through a simpler process than a polysilicon film, and therefore, can be used to make a device that should have a huge display area.
However, depending on the structure of the oxide semiconductor TFT, the oxide semiconductor film could be damaged so easily during the manufacturing process that the performance of the transistor could deteriorate eventually. For example, in an oxide semiconductor TFT with a bottom gate, top contact structure, when its source/drain electrodes are formed by patterning, a dry etching process is usually performed using a halogen gas such as a fluorine gas or a chlorine gas. In that case, however, the oxide semiconductor film will be exposed to halogen plasma, thus dissociating oxygen atoms from the oxide semiconductor film and causing some deterioration in performance (such as deterioration of the OFF-state characteristic due to a decrease in channel resistance).
Thus, to overcome such a problem, Patent Document Nos. 1 and 2 propose covering the channel region of an active layer made of an oxide semiconductor with an insulating film that functions as an etch stop layer (as a channel protective film).
FIG. 13 illustrates a cross-sectional structure for a known oxide semiconductor TFT 10A with such a channel protective film. The oxide semiconductor TFT 10A includes a substrate 1, a gate electrode 11 provided on the substrate 1, a gate insulating film 12 which covers the gate electrode 11, an oxide semiconductor layer 13 formed on the gate insulating film 12, a channel protective film 16 which has been formed over the channel region of the oxide semiconductor layer 13, and source and drain electrodes 14 and 15 arranged on the oxide semiconductor layer 13. The source and drain electrodes 14 and 15 are electrically connected to the oxide semiconductor layer 13.
In the process of fabricating an oxide semiconductor TFT 10A such as the one shown in FIG. 13, when the source and drain electrodes 14 and 15 are formed by patterning a metal film, the channel region of the oxide semiconductor layer 13 is protected with the channel protective film 16. Thus, it is possible to prevent the channel region of the oxide semiconductor layer 13 from getting damaged.
However, just by providing a channel protective film such as the one disclosed in Patent Documents Nos. 1 and 2, the reliability of an oxide semiconductor TFT cannot be increased sufficiently for the reasons to be described below.
An oxide semiconductor film has the property of having a carrier concentration which varies significantly when adsorbing water. That is why if an oxide semiconductor TFT were left in a high-temperature and high-humidity environment, water would diffuse to reach its channel region to deteriorate the transistor characteristic seriously.
Thus, a technique for preventing water from being adsorbed into the oxide semiconductor layer of an oxide semiconductor TFT is disclosed in Patent Document No. 3. FIGS. 14(a) and 14(b) illustrate an oxide semiconductor TFT 10B as disclosed in Patent Document No. 3. Specifically, FIG. 14(a) is a plan view schematically illustrating the oxide semiconductor TFT 10B and FIG. 14(b) is a cross-sectional view as viewed on the plane 14B-14B′ shown in FIG. 14(a).
In this oxide semiconductor TFT 10B, its gate insulating film 12 has a multilayer structure including a silicon nitride layer 12c and a silicon oxide layer 12d which has been formed on the silicon nitride layer 12c. However, the silicon oxide layer 12d has been formed selectively only in a region where there is the oxide semiconductor layer 13. That is to say, the gate insulating film 12 has the multilayer structure only where there is the oxide semiconductor layer 13 but has a single-layer structure everywhere else.
On the silicon nitride layer 12c of the gate insulating film 12, the upper and side surfaces of the oxide semiconductor layer 13 and the side surface of the silicon oxide layer 12d of the gate insulating film 12 are covered with source and drain electrodes 14, 15 and a channel protective film 16.
The channel protective film 16 has a triple layer structure in which first, second and third layers 16c, 16d and 16e have been stacked one upon the other in this order. Each of the first, second and third layers 16c, 16d and 16e may be an aluminum oxide layer, a silicon nitride layer or a silicon oxynitride layer. At least one of the second and third layers 16d and 16e is either an aluminum oxide layer or a silicon nitride layer.
In this oxide semiconductor TFT 10B, since the upper and side surfaces of the oxide semiconductor layer 13 and the side surface of the silicon oxide layer 12d are covered with the source and drain electrodes 14, 15 and the channel protective film 16 on the silicon nitride layer 12c, water to be adsorbed into the oxide semiconductor layer 13 can be reduced. In addition, in this oxide semiconductor TFT 10B, since the silicon oxide layer 12d has been formed where there is the oxide semiconductor layer 13, a good device interface is formed between the silicon oxide layer 12d and the oxide semiconductor layer 13, and it is possible to prevent lattice defects from being caused in the oxide semiconductor layer 13.